Radio frequency (RF) can be a complex subject to navigate, but it does not have to be. If you are just getting started with radios or maybe you cannot find that old reference book about antenna aperture, this guide can help. It is intended to provide a basic understanding of RF technology, as well act as a quick reference for those who “know their stuff” but may be looking to brush up on that one niche term that they never quite understood. This document is also a useful reference for Maxim’s products and data sheets, an index to deeper analysis found in our application notes, and a general reference for all things RF.
标签： 无线技术
上传时间： 2013-10-08
上传用户：kinochen
Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.
上传时间： 2014-01-03
上传用户：Huge_Brother
ORCAD在使用的时候总会出现这样或那样的问题…但下这个问题比较奇怪…在ORCAD中无法输出网表…弹出下面的错误….这种问题很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天没找到问题…终于在花了N多时间后发现问题所在…其实这个问题就是不要使用ORCAD PSPICE 库里面的元件来画电路图…实际中我是用了PSPICE里面和自己制作的二种电阻和电容混合在一起…就会出现这种问题…
上传时间： 2013-11-20
上传用户：zaocan888
This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their use.
上传时间： 2014-12-30
上传用户：PresidentHuang
Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.
标签： Creating Machines Mentor State
上传时间： 2013-11-02
上传用户：xauthu
ORCAD在使用的时候总会出现这样或那样的问题…但下这个问题比较奇怪…在ORCAD中无法输出网表…弹出下面的错误….这种问题很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\MAIN.DSNERROR [NET0021] cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天没找到问题…终于在花了N多时间后发现问题所在…其实这个问题就是不要使用ORCAD PSPICE 库里面的元件来画电路图…实际中我是用了PSPICE里面和自己制作的二种电阻和电容混合在一起…就会出现这种问题…
上传时间： 2013-11-02
上传用户：sz_hjbf
Calculation of the Differential Impedance of Tracks on FR4 substrates There is a discrepancy between calculated and measured values of impedance for differential transmission lineson FR4. This is especially noticeable in the case of surface microstrip configurations. The anomaly is shown tobe due to the nature of the substrate material. This needs to be considered as a layered structure of epoxy resinand glass fibre. Calculations, using Boundary Element field methods, show that the distribution of the electricfield within this layered structure determines the apparent dielectric constant and therefore affects theimpedance. Thus FR4 cannot be considered to be uniform dielectric when calculating differential impedance.
上传时间： 2013-10-18
上传用户：masochism
Generating next numbers in SQLServer should not be a problem. But problems arise when a customer asks for different types of next numbers that you cannot generate directly from SQL Server. This brief article describes how you would tackle this problem in different scenarios.
标签： Generating SQLServer customer problems
上传时间： 2015-01-10
上传用户：as275944189
解决时钟问题，acm竞赛题 A weird clock marked from 0 to 59 has only a minute hand. It won t move until a special coin is thrown into its box. There are different kinds of coins as your options. However once you make your choice, you cannot use any other kind. There are infinite number of coins of each kind, each marked with a number d ( 0 <= 1000 ), meaning that this coin will make the minute hand move d times clockwise the current time. For example, if the current time is 45, and d = 2. Then the minute hand will move clockwise 90 minutes and will be pointing to 15. Now you are given the initial time s ( 0 <= s <= 59 ) and the coin s type d. Write a program to find the minimum number of d-coins needed to turn the minute hand back to 0.
标签： 时钟
上传时间： 2015-05-21
上传用户：rishian
This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
标签： Development Startix2 tailored Altera
上传时间： 2014-01-18
上传用户：chongcongying
