This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five Transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or Transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
标签： CPLD
上传时间： 2014-12-04
上传用户：qazxsw
UART 4 UART参考设计，Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - Transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
上传时间： 2013-11-01
上传用户：18862121743
The VideoTransmit class is a simple wrapper that can be programmed to take video input from a source of your choice and Transmit the video to a destination computer or network in JPEG format.
标签： VideoTransmit programmed wrapper simple
上传时间： 2014-01-06
上传用户：zhuyibin
The audioTransmit class is a simple wrapper that can be programmed to take audio input from a source of your choice and Transmit the audio to a destination computer
标签： audioTransmit programmed wrapper simple
上传时间： 2013-12-16
上传用户：sjyy1001
nRF24E1编程下载板是我们自行开发的简易无线通信模块nRF24E1的在线下载板，使用方便。 nRF24E1编程下载板源程序包括上位机程序、单片机固件程序和nRF24E1内51核控制程序， 分别存放在“上位机程序”、“AT89S52”和“nRF24E1”三个文件夹内。 “上位机程序”内有应用软件download.exe。 “AT89S52”内有单片机固件源程序download.c，可以直接编译连接生成下载文件，下载到目标单片机AT89S52中。 “nRF24E1”内有控制nRF24E1工作的源程序，分别是： 24E1.c:典型控制应用； putchar.c:nRF24E1串行通信源程序； Transmit.c:nRF24E1无线发送源程序； receive.c:nRF24E1无线接收源程序； “Temperature”：nRF24E1控制DS18B20温度采集并无线发送源程序。
上传时间： 2015-05-07
上传用户：songyue1991
In this report we provide an overview of several closely related methods developed during the last few yers, to smooth, denoise, edit, compress, Transmit, and animate very large polygonal models.
标签： developed overview provide closely
上传时间： 2013-12-16
上传用户：ippler8
nRF24E1编程下载板是我们自行开发的简易无线通信模块nRF24E1的在线下载板，使用方便。 nRF24E1编程下载板源程序包括上位机程序、单片机固件程序和nRF24E1内51核控制程序， 分别存放在“上位机程序”、“AT89S52”和“nRF24E1”三个文件夹内。 “上位机程序”内有应用软件download.exe。 “AT89S52”内有单片机固件源程序download.c，可以直接编译连接生成下载文件，下载到目标单片机AT89S52中。 “nRF24E1”内有控制nRF24E1工作的源程序，分别是： 24E1.c:典型控制应用； putchar.c:nRF24E1串行通信源程序； Transmit.c:nRF24E1无线发送源程序； receive.c:nRF24E1无线接收源程序； “Temperature”：nRF24E1控制DS18B20温度采集并无线发送源程序。
上传时间： 2013-12-02
上传用户：jackgao
nRF24E1编程下载板是我们自行开发的简易无线通信模块nRF24E1的在线下载板，使用方便。 nRF24E1编程下载板源程序包括上位机程序、单片机固件程序和nRF24E1内51核控制程序， 分别存放在“上位机程序”、“AT89S52”和“nRF24E1”三个文件夹内。 “上位机程序”内有应用软件download.exe。 “AT89S52”内有单片机固件源程序download.c，可以直接编译连接生成下载文件，下载到目标单片机AT89S52中。 “nRF24E1”内有控制nRF24E1工作的源程序，分别是： 24E1.c:典型控制应用； putchar.c:nRF24E1串行通信源程序； Transmit.c:nRF24E1无线发送源程序； receive.c:nRF24E1无线接收源程序； “Temperature”：nRF24E1控制DS18B20温度采集并无线发送源程序。
上传时间： 2013-12-02
上传用户：wqxstar
This example provides a description of how to set a communication with the bxCAN in loopback mode: - Transmit and receive a standard data frame by polling at 100Kbit/S - Transmit and receive an extended data frame with interrupt at 500Kbit/S - lit some LEDs depending of the program succeed or not
标签： communication description provides loopback
上传时间： 2016-04-24
上传用户：frank1234
