This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet(TEMAC) performance testing system using the ML405 board and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.
上传时间： 2013-11-11
上传用户：saharawalker
The Tri-Mode Ethernet MAC (TEMAC) UltraController-II module is a minimal footprint,embedded network processing engine based on the PowerPC™ 405 (PPC405) processor coreand the TEMAC core embedded within a Virtex™-4 FX Platform FPGA. The TEMACUltraController-II module connects to an external PHY through Gigabit Media IndependentInterface (GMII) and Management Data Input/Output (MDIO) interfaces and supports tri-mode(10/100/1000 Mb/s) Ethernet. Software running from the processor cache reads and writesthrough an On-Chip Memory (OCM) interface to two FIFOs that act as buffers between thedifferent clock domains of the PPC405 OCM and the TEMAC.
上传时间： 2013-10-26
上传用户：yuzsu
本书系统讲解通信网络领域Xilinx FPGA内部的IP硬核。以流行的Xilinx Virtex-6型号芯片举例，涵盖Xilinx FPGA在通信领域主流的IP核，阐述Xilinx FPGA时钟资源和DCM、PLL和MMCM时钟管理器的特性和使用方法；介绍基于Block RAM资源生成ROM、RAM、FIFO和CAM核的使用过程。阐述TEMAC核背景知识、内部结构、接口时序和配置参数，给出生成实例；介绍LVDS技术规范、源同步实现方案和去偏移技术，讲解Xilinx FPGA中IODELAYE1、ISERDES1和OSERDES核使用方法；阐述Xilinx FPGA DDR3控制器IP核的结构组成、模块划分、接口信号和物理约束等。
上传时间： 2022-06-10
上传用户：kjl
