usb 端点测试程序 块传输 从EP6输入512字到EP2传出。
上传时间: 2013-12-29
上传用户:ryb
使用Usb cy7c68013与DSP通信,现在已经能够很正确的传递(上传数据)了。 USB资源: 使用了Ep2,Ep6 EP2, out auto Ep6, in auto FlagA--- PF3 FlagB--- PF6 FlagC--- PF1 需要 EP2 EMPTY EP6 FULL信号 因此 FlagA--- PF3 --- EP2空 --- 8 h FlagB--- PF6 --- EP6满 --- e h FlagC--- PF1 PINFLAGSAB=0xE8 极性设置: PKTEND,EPEF,EPFF high 其他的低 因此 FIFOPINPOLAR = 0x23 包结束信号接在DSP 的 PF7 上面。 以上结束06.11.28
上传时间: 2015-12-26
上传用户:youke111
The first task at hand is to set up the endpoints appropriately for this example. The following code switches the CPU clock speed to 48 MHz (since at power-on default it is 12 MHz), and sets up EP2 as a Bulk OUT endpoint, 4x buffered of size 512, and EP6 as a Bulk IN endpoint, also 4x buffered of size 512. This set-up utilizes the maximum allotted 4-KB FIFO space. It also sets up the FIFOs for manual mode, word-wide operation, and goes through a FIFO reset and arming sequence to ensure that they are ready for data operations
标签: appropriately The endpoints following
上传时间: 2013-12-02
上传用户:dianxin61
使用68013的测试程序,包含68013固件程序(采用slave FIFO bulk同步读写,EP2 OUT,EP6 IN),驱动,PC端测试用程序。CPLD的VHDL代码
上传时间: 2013-11-29
上传用户:luke5347