last time when i came here to find some clock references. but most of them can not works well. so this files works well on FPGA board.
标签: references clock works last
上传时间: 2015-11-07
上传用户:baitouyu
ami8563 clock source code
上传时间: 2015-11-15
上传用户:anng
Java Clock是个免费的嵌在HTML文档中的小应用程序,可以在你的网页上显示一个时钟,既可以显示模拟形式的时钟,还可以显示数字形式的时钟,你通过点击,进行切换。
上传时间: 2014-11-25
上传用户:水口鸿胜电器
Clock gating logic for LEON3 processor.
标签: processor gating Clock LEON3
上传时间: 2014-01-18
上传用户:yulg
fpga clock 设计,资料较好,供大家参考,非商用目的哦
上传时间: 2013-12-11
上传用户:rocwangdp
pic16f8 based clock, it display the time on the TV display. This include source code and sch
标签: display the include source
上传时间: 2015-11-29
上传用户:nanfeicui
There are many different (and often confusing) terms associated with clock-based devices. This application note attempts to clarify these terms, and hence serves as a comprehensive reference on clock terminology. This application note can be divided into two sections. The first section describes and distinguishes between various clock sources available today. The second section defines and distinguishes between various parameters used to describe clocks. This section also provides methods of measuring some of these parameters.
标签: clock-based associated different confusing
上传时间: 2015-12-02
上传用户:sssl
Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. It introduces the reader to various kinds of jitter in high-speed systems, their causes and their effects, and methods of reducing jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
标签: extremely PLL-based important drivers
上传时间: 2014-11-25
上传用户:asddsd
Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout.
标签: Semiconductor application generators PLL-based
上传时间: 2013-12-20
上传用户:水中浮云
清华大学-电子信息工程系-实验用ARM-linux-源代码-CLOCK篇
上传时间: 2015-12-06
上传用户:caiiicc