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标签： 登录器源码登录器源码
上传时间： 2015-06-04
上传用户：wdf100
库存管理系统
标签： 库存管理系统
上传时间： 2016-05-09
上传用户：ccn158525
cardoso的独立分量分析（ICA）的特征矩阵联合近似对角化（JADE）方法。
标签： JADE
上传时间： 2017-05-08
上传用户：1044109363@qq.com
PCI插槽64位板卡 转换座的pcb和原理图
上传时间： 2019-10-09
上传用户：zhmy923
(www.0379zd.com)ASP.NET程序员培训网站源码.rar
上传时间： 2013-12-18
上传用户：semi1981
系统构架师论文论文 系统构架师论文论文 系统构架师论文论文 系统构架师论文论文系统构架师论文论文https://www.eeworm.com/dl/617/195136.htmlhttps://www.eeworm.com/dl/617/195136.html
上传时间： 2021-10-18
上传用户：陈浩
DES算法及其在VC++6.0下的实现,编译时需要WinPcap开发包,您可以从http://www.vckbase.com/tools下载 WinPcap Developer s pack
标签： WinPcap Developer vckbase tools
上传时间： 2014-01-16
上传用户：iswlkje
s file contains the Joone Distributed training Environment (DTE). See http://www.jooneworld.com/docs/dte.html to learn more about it. To learn more about Joone - Java Object Oriented Neural Engine: http://www.joone.org Joone and the DTE are both released with the LGPL license @2004 Paolo Marrone and the Joone team - All rights reserved ==================================================================== Credits The Joone DTE uses the following external packages: - SUN Jini Network Technology http://wwws.sun.com/software/jini/index.html - Computefarm Framework http://computefarm.jini.org - Spring Framework http://www.springframework.org We want to thank all the authors and contributors of the above packages. Please read the respective licenses contained in this distribution.
标签： Distributed Environment jooneworld contains
上传时间： 2013-12-24
上传用户：钓鳌牧马
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
E库多条件查询模块（带模糊查询）\E库多条件查询模块（带模糊查询）易语言可到http://www.dywt.com.cn/main.asp下载 本程序在易语言2.7版下开发 易语言支持Windows和Linux两大主流平台
上传时间： 2013-12-25
上传用户：冇尾飞铊
