This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System
上传时间: 2013-11-05
上传用户:维子哥哥
Abstract: There are many things to consider when designing a power supply for a field-programmablegate array (FPGA). These include (but are not limited to) the high number of voltage rails, and thediffering requirements for both sequencing/tracking and the voltage ripple limits. This application noteexplains these and other power-supply considerations that an engineer must think through whendesigning a power supply for an FPGA.
上传时间: 2013-11-10
上传用户:iswlkje
Abstract: This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using
上传时间: 2014-01-21
上传用户:haohao
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.
上传时间: 2013-10-22
上传用户:liu999666
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上传时间: 2014-12-28
上传用户:zhang97080564
WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.
上传时间: 2013-10-22
上传用户:685
选择映射法(SLM)和概率类算法都可以降低OFDM (Orthogonal Frequency Division Multiplexing)系统的PAPR(Peak to Average Power Ratio),传统SLM算法自身较为复杂,但由于其优良的性能,弃之可惜。研究表明,SLM算法和限幅类算法在性能上具有一定的互补性。任何一个算法未必能达到抑制PAPR的理想效果,在深入研究了两个算法的基础上,将其优点联合起来,以达到降低OFDM系统PAPR的目的。最后对联合改进算法进行了分析与仿真,并验证了联合改进算法的有效性和可行性
上传时间: 2013-11-22
上传用户:xinhaoshan2016
大功率,远距离传输wifi模块
上传时间: 2014-12-29
上传用户:ljt101007
针对飞行模拟器座舱数据采集的复杂性,设计了一种基于以太网分布式的数据采集控制系统,该系统是RCM5700微处理器模块上的以太网应用。在系统的基础上具体讨论了PoE技术的应用,在传输数据的网线上同时提供电流,提出并实现了一种包括辅助电源在内的完整可靠的PoE供电方案。设计采用美国国家半导体的LM5073和LM5576并根据不同的负载情况,进行稳定可靠的电压转换,以满足数据采集电路的要求。实验结果表明:该设计稳定可靠,满足低于13 W的采集节点供电要求,提高了模拟器信号采集系统的通用性和标准化程度,避免了以往数据采集节点单独繁琐的电源设计。 Abstract: Aiming at the complexity of large avion simulation and controlling,the simulator cabin distribute data collecting and control system was designed. This system is the application of RCM5700 on Ethernet. Based on this system,PoE technique that makes Ethernet can also provide power were expounded with emphasis and included FAUX design the PoE resolution was realized. To achieve the requirement of this system,LM5073 and LM5576 were used to DC-DC switch. From the data of experiment,the design filled the requirement of power-need of node whose power was lower than 13W. The application of the technique can advance the degree of simulation data collections currency and standardization and avoid designing additional power system.
上传时间: 2013-11-09
上传用户:xyipie
This article describes the procedure to configure and program EXAR Corporation’s PowerXR Digital Power devicesvia I2C interface. Details shown here apply to XRP7704/08/40 and XRP7713/14 devices and PowerArchitectsoftware version 3.00.
上传时间: 2013-10-20
上传用户:tianyi223