电子技术基础_模拟部分(第五版)_康华光_课后答
上传时间： 2013-11-11
上传用户：gps6888
SQSQ
上传时间： 2013-10-30
上传用户：iven
康华光《数字电子技术基础》第五版课后答案
上传时间： 2013-10-12
上传用户：kao21
asaq
标签： 数字信号处理
上传时间： 2013-12-29
上传用户：cmc_68289287
Abstract: This tutorial discusses proper printed-circuit board (PCB) grounding for mixed-signal designs. Formost applications a simple method without cuts in the ground plane allows for successful PCB layouts withthis kind of IC. We begin this document with the basics: where the current flows. Later, we describe how toplace components and route signal traces to minimize problems with crosstalk. Finally, we move on toconsider power supply-currents and end by discussing how to extend what we have learned to circuits withmultiple mixed-signal ICs.
上传时间： 2013-11-04
上传用户：pol123
秒脉冲计数器
上传时间： 2013-12-23
上传用户：墙角有棵树
Abstract: This application note describes how to design boost converters using the MAX17597 peakcurrent-mode controller. Boost converters can be operated in discontinuous conduction mode (DCM) orcontinuous conduction mode (CCM). This operating mode can affect the component choices, stress levelin power devices, and controller design. Formulas for calculating component values and ratingsare alsopresented.
上传时间： 2013-11-16
上传用户：zcs023047
好
上传时间： 2013-11-10
上传用户：star_in_rain
模糊C-均值聚类算法是一种无监督图像分割技术，但存在着初始隶属度矩阵随机选取的影响，可能收敛到局部最优解的缺点。提出了一种粒子群优化与模糊C-均值聚类相结合的图像分割算法，根据粒子群优化算法强大的全局搜索能力，有效地避免了传统的FCM对随机初始值的敏感，容易陷入局部最优的缺点。实验表明，该算法加快了收敛速度，提高了图像的分割精度。
上传时间： 2013-10-25
上传用户：llandlu
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上传时间： 2013-10-25
上传用户：banyou
