代码搜索：dataIn

找到约 2,888 项符合「dataIn」的源代码

代码结果 2,888
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/429772/8789837

h ra8835c.h

#define wr PORTC.3 #define rd PORTC.4 #define cs PORTC.5 #define a0 PORTC.6 #define rst PORTC.7 //#define busy PORC.4 #define DATAIN DDRA=0 #define DATAOUT DDRA=0XFF #define data_ora
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www.eeworm.com/read/384663/8852073

v datacnl.v

module datacnl( clk, rst, r_ram_rdb, r_ram_rab, r_req, r_ack, s_ram_wdb, s_ram_wab, s_ram_wen, s_req, s_ack, cmd, cmdack, addr, datain, dataout, start_s
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www.eeworm.com/read/280015/10368367

c subfuncs.c

#include typedef unsigned char uchar; typedef unsigned int uint; extern const unsigned char shuzi_table[]; #define LCD_DataIn P4DIR=0x00 //数据口方向设置为输入 #define LCD_DataOut
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www.eeworm.com/read/423920/10526418

txt rs232_txd_source_code.txt

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Rs232Txd is port( Reset, Send, Clock16x: in std_logic; DataIn: in std_logic_vector(7 downto 0); Txd: out std_lo
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www.eeworm.com/read/419062/10887882

c cry12864.c

#include #include "Cry12864.h" typedef unsigned char uchar; typedef unsigned int uint; extern const unsigned char shuzi_table[]; #define LCD_DataIn P4DIR=0x00 //数据口方向设置为
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www.eeworm.com/read/142672/12931062

awf stream.awf

$WAVE3 $RESOLUTION 1000 $SIGNAL 1 clk -1 0 SIGNAL 10000000 P 1 0 CS "0" $SIGNAL 2 reset -1 0 SIGNAL 10000000 P 2 0 CS "0" $SIGNAL 3 datain -1 0 SIGNAL 10000000 P 3 0 CS "0" $SIGNAL 4 pmatch -1
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www.eeworm.com/read/478888/6707064

c cry12864.c

#include typedef unsigned char uchar; typedef unsigned int uint; extern const unsigned char shuzi_table[]; #define LCD_DataIn P4DIR=0x00 //数据口方向设置为输入 #define LCD_DataOut
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www.eeworm.com/read/405166/11470555

c cry12864.c

#include typedef unsigned char uchar; typedef unsigned int uint; extern const unsigned char shuzi_table[]; #define LCD_DataIn P4DIR=0x00 //数据口方向设置为输入 #define LCD_DataOut
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www.eeworm.com/read/346338/11754013

v fifo_register.v

module fifo_register(clock1, clock2, shift_fifo, hold_fifo, en_outfifo, en_infifo, datain, dataout); input clock1, clock2; input shift_fifo, hold_fifo, en_outfifo, en_infifo
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www.eeworm.com/read/14792/410931

vhd sn7448.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity sn7448 is port(lt,rbi:std_logic; datain:in std_logic_vector(3 downto 0); rbo_b
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