代码搜索:State Machine
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vhd sdrmc_state.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_STD.all;
entity sdrmc_state is
port ( pre_sd_doe_n : out std_logic;
pre_sd_doe2_n, pre_sd_ready, pre_sd_add_mx: out std_logic;
pre_sd_ra
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bmp state0.bmp
www.eeworm.com/read/332369/12762156
bmp state1.bmp
www.eeworm.com/read/144568/12784988
state idle.sdt.state
OrgMainWindow 44 58 768 474 C:\Telelogic\SDL_TTCN_Suite4.3\bin\wini386\手机实验\idle.sdt
SDLEWindow 110 145 768 474 1 C:\Telelogic\SDL_TTCN_Suite4.3\bin\wini386\手机实验\random.sun
MSCEWindow 132 174 768 47
www.eeworm.com/read/245428/12800341
m bin_state.m
function bin_state = bin_state( int_state, m )
% Copyright Matt C. Valenti
% MPRG lab, Virginia Tech
% for academic use only
% converts an vector of integer into a matrix; the i-th row is the binary
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m int_state.m
function int_state = int_state( state )
% Copyright 1996 Matthew C. Valenti
% MPRG lab, Virginia Tech.
% for academic use only
% converts a row vector of m bits into a integer (base 10)
[dummy, m] =