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ncd memory_map.ncd

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pad_txt memory.pad_txt

Release 6.2i - Par G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Sun Nov 11 22:54:41 2007 INPUT FILE: memory_map.ncd OUTPUT FILE: memory_pad.txt PART TYPE: xcv20
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ant memory_wave.ant

-- C:\XILINX\BIN\MYCPU16 -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Thu Nov 15 13:55:08 2007 LIBRARY IEEE; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; LIB
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twr visit_memory.twr

-------------------------------------------------------------------------------- Release 6.2i Trace G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. C:/Xilinx/bin/nt/trce.exe -ints
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prj visit_memory.prj

vhdl work visit_memory.vhdl
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ngc visit_memory.ngc

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txt memory_pad.txt

Release 6.2i - Par G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Sun Nov 11 22:54:41 2007 INPUT FILE: memory_map.ncd OUTPUT FILE: memory_pad.txt PART TYPE: xcv20
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csv memory_pad.csv

Release 6.2i - Par G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Sun Nov 11 22:54:40 2007 NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft E
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mrp visit_memory.mrp

Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'visit_memory' Design Information ------------------ Command Line : C:/Xilinx/bin/nt/map.exe -intstyle ise -p xcv200-pq240-4 -cm area -p
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ngr visit_memory.ngr

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